| Autores |
|---|
| Moreno Armendáriz Marco Antonio |
| Cruz Cortés Nareli |
| Duchanoy Martínez Carlos Alberto |
| León Javier Alejandro |
| Quintero Téllez Rolando |
| Título | Hardware implementation of the elitist compact Genetic Algorithm using Cellular Automata pseudo-random number generator |
| Tipo | Revista |
| Sub-tipo | JCR |
| Descripción | Computers and Electrical Engineering |
| Resumen | In this paper the design and implementation of two versions of the compact Genetic Algorithm (cGA), with and without mutation and elitism, and a Cellular Automata-based pseudo-random number generator on a Field Programmable Gate Arrays (FPGAs) are accomplished. The design is made using a Hardware Description Language, called VHDL. Accordingly, the obtained results show that it is viable to have this searching algorithm in hardware to be used in real time applications. |
| Observaciones | |
| Lugar | |
| País | Inglaterra |
| No. de páginas | 1367-1379 |
| Vol. / Cap. | Vol. 39, Issue 4 |
| Inicio | 2013-05-01 |
| Fin | |
| ISBN/ISSN |